Dynamically Reconfigurable Multi-Classifier Architecture on FPGA

Work Plan

• System partitioning and specification of the main modules
• Implementation and validation of a single K-NN core
• Design space exploration: characterizing the impact of the main system parameters on cost and performance
• Design and deployment of a dynamically reconfigurable infrastructure for multiple K-NN cores
• System validation with standard benchmark data sets;
• Writing up the dissertation

Details

• Status: Completed
• Student: Joana Lima Macedo
• Thesis Document